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Boot and Recovery Environment for Embedded Devices
Copyright (C) 2018 HackPascal <hackpascal@gmail.com>
Build date 2018-12-29 [git-135bed9]
Version 1.1 (r1266)
DRAM: 512MB
Platform: MediaTek MT7621A ver 1, eco 3
Board: Newifi D2
Clocks: CPU: 880MHz, DDR: 1066MHz, Bus: 293MHz, Ref: 40MHz
Flash: Winbond W25Q128 (16MB) on mt7621-spi.0
rt2880-eth: MAC address from EEPROM is invalid, using default settings.
rt2880-eth: Using MAC address 00:0c:43:00:00:01
eth0: MediaTek MT7530 Gigabit switch
Network started on eth0, inet addr 192.168.1.1, netmask 255.255.255.0
Press any key to interrupt autoboot ... 0
Trying to boot firmware from 0x00050000 in flash bank 0 ...
Reading data into memory ...
U-Boot firmware image header detected.
Image Name: OpenWrt Linux-3.10.14-p112871
Data Size: 1260164 Bytes
Load Address: 80001000
Entry Point: 80001000
Uncompressing data (LZMA) ... done.
Flushing cache ... done.
Starting kernel at 0x80001000...
怘????fff??~??~fx???怘?怘?f????f????f?f???[ 0.000000] Linux version 3.10.14 (work@localhost.localdomain) (gcc version 4.8.3 (OpenWrt/Linaro GCC 4.8-2014.04 r10331) ) #2 SMP Tue Apr 3 16:56:50 CST 2018
[ 0.000000] after arcs_cmdline: console=ttyS1,115200n8 root=/dev/mtdblock5 board=RN1150W
[ 0.000000]
[ 0.000000] The CPU feqenuce set to 880 MHz
[ 0.000000] GCMP present
[ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[ 0.000000] Software DMA cache coherency
[ 0.000000] Determined physical RAM map:
[ 0.000000] memory: 08000000 @ 00000000 (usable)
[ 0.000000] Initrd not found or empty - disabling initrd
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x00000000-0x07ffffff]
[ 0.000000] HighMem empty
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x00000000-0x07ffffff]
[ 0.000000] Detected 3 available secondary CPU(s)
[ 0.000000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
[ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.000000] PERCPU: Embedded 7 pages/cpu @81103000 s6464 r8192 d14016 u32768
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32512
[ 0.000000] Kernel command line: console=ttyS1,115200n8 root=/dev/mtdblock5 board=RN1150W rootfstype=squashfs,jffs2
[ 0.000000] palloc_mem: alloc success !palloc_mem = 0X81123000
[ 0.000000]
[ 0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
[ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
[ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
[ 0.000000] Writing ErrCtl register=00011a30
[ 0.000000] Readback ErrCtl register=00011a30
[ 0.000000] Memory: 121628k/131072k available (2765k kernel code, 9444k reserved, 701k data, 240k init, 0k highmem)
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] NR_IRQS:128
[ 0.000000] console [ttyS1] enabled
[ 0.104000] Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072)
[ 0.136000] pid_max: default: 32768 minimum: 301
[ 0.140000] Mount-cache hash table entries: 512
[ 0.144000] launch: starting cpu1
[ 0.148000] launch: cpu1 gone!
[ 0.148000] CPU1 revision is: 0001992f (MIPS 1004Kc)
[ 0.148000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
[ 0.148000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.148000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.180000] Synchronize counters for CPU 1: done.
[ 0.188000] launch: starting cpu2
[ 0.192000] launch: cpu2 gone!
[ 0.192000] CPU2 revision is: 0001992f (MIPS 1004Kc)
[ 0.192000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
[ 0.192000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.192000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.224000] Synchronize counters for CPU 2: done.
[ 0.232000] launch: starting cpu3
[ 0.232000] launch: cpu3 gone!
[ 0.232000] CPU3 revision is: 0001992f (MIPS 1004Kc)
[ 0.232000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
[ 0.232000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.232000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.260000] Synchronize counters for CPU 3: done.
[ 0.268000] Brought up 4 CPUs
[ 0.272000] NET: Registered protocol family 16
[ 0.276000] enter ralink_machine_setup
[ 0.280000] MIPS: machine is TGNET_RN1150W
[ 0.284000] enter TG_RN1150W_init
[ 0.284000] RALINK_GPIOMODE = 481ac
[ 0.288000] RALINK_GPIOMODE = 481ac
[ 0.288000] interval=20, gpio=18
[ 0.584000] release PCIe RST: RALINK_RSTCTRL = 7000000
[ 0.588000] PCIE PHY initialize
[ 0.588000] ***** Xtal 40MHz *****
[ 0.592000] start MT7621 PCIe register access
[ 1.184000] RALINK_RSTCTRL = 7000000
[ 1.188000] RALINK_CLKCFG1 = 77ffeff8
[ 1.188000]
[ 1.188000] *************** MT7621 PCIe RC mode *************
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