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Boot and Recovery Environment for Embedded Devices
Copyright (C) 2017 HackPascal <hackpascal@gmail.com>
Build date 2017-09-21 [git-35a696e]
Version 1.1 (r1126)
DRAM: 128MB
Platform: MediaTek MT7621A ver 1, eco 3
Board: Phicomm K2P
Clocks: CPU: 880MHz, DDR: 1200MHz, Bus: 293MHz, Ref: 40MHz
Flash: Macronix MX25L12835E (16MB) on rt6855a-spi
rt2880-eth: MAC address from EEPROM is invalid, using default settings.
rt2880-eth: Using MAC address 00:0c:43:00:00:01
eth0: MediaTek MT7530 Gigabit switch
Network started on eth0, inet addr 192.168.1.1, netmask 255.255.255.0
Press any key to interrupt autoboot ... 0
Trying to boot firmware from 0x000a0000 in flash bank 0 ...
Reading data into memory ...
U-Boot firmware image header detected.
Image Name: OpenWrt-Linux-3.10.14
Data Size: 3241002 Bytes
Load Address: 81001000
Entry Point: 81001000
Uncompressing data (LZMA) ... done.
Flushing cache ... done.
Starting kernel at 0x81001000...
LINUX started...
THIS IS ASIC
SDK 5.0.S.0
[ 0.000000] Linux version 3.10.14 (jenkins@SOHO-OPWRT) (gcc version 4.8.3 (OpenWrt/Linaro GCC 4.8-2014.04 unknown) ) #1 SMP Thu May 4 18:12:48 CST 2017
[ 0.000000]
[ 0.000000] The CPU feqenuce set to 880 MHz
[ 0.000000] GCMP present
[ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[ 0.000000] Software DMA cache coherency
[ 0.000000] Determined physical RAM map:
[ 0.000000] memory: 08000000 @ 00000000 (usable)
[ 0.000000] Initrd not found or empty - disabling initrd
[ 0.000000] Zone ranges:
[ 0.000000] DMA [mem 0x00000000-0x00ffffff]
[ 0.000000] Normal [mem 0x01000000-0x07ffffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x00000000-0x07ffffff]
[ 0.000000] Detected 3 available secondary CPU(s)
[ 0.000000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
[ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.000000] PERCPU: Embedded 7 pages/cpu @8198e000 s6464 r8192 d14016 u32768
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32512
[ 0.000000] Kernel command line: console=ttyS1,57600n8 root=/dev/mtdblock6 rootfstype=squashfs,jffs2
[ 0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
[ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
[ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
[ 0.000000] Writing ErrCtl register=0004b050
[ 0.000000] Readback ErrCtl register=0004b050
[ 0.000000] Memory: 121064k/131072k available (5395k kernel code, 10008k reserved, 2338k data, 260k init, 0k highmem)
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] NR_IRQS:128
[ 0.000000] console [ttyS1] enabled
[ 0.120000] Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072)
[ 0.160000] pid_max: default: 32768 minimum: 301
[ 0.164000] Mount-cache hash table entries: 512
[ 0.168000] launch: starting cpu1
[ 0.172000] launch: cpu1 gone!
[ 0.172000] CPU1 revision is: 0001992f (MIPS 1004Kc)
[ 0.172000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
[ 0.172000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.172000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.204000] Synchronize counters for CPU 1: done.
[ 0.212000] launch: starting cpu2
[ 0.216000] launch: cpu2 gone!
[ 0.216000] CPU2 revision is: 0001992f (MIPS 1004Kc)
[ 0.216000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
[ 0.216000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.216000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.248000] Synchronize counters for CPU 2: done.
[ 0.256000] launch: starting cpu3
[ 0.260000] launch: cpu3 gone!
[ 0.260000] CPU3 revision is: 0001992f (MIPS 1004Kc)
[ 0.260000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
[ 0.260000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.260000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.288000] Synchronize counters for CPU 3: done.
[ 0.296000] Brought up 4 CPUs
[ 0.300000] NET: Registered protocol family 16
[ 0.600000] release PCIe RST: RALINK_RSTCTRL = 7000000
[ 0.604000] PCIE PHY initialize
[ 0.608000] ***** Xtal 40MHz *****
[ 0.612000] start MT7621 PCIe register access
[ 1.204000] RALINK_RSTCTRL = 7000000
[ 1.208000] RALINK_CLKCFG1 = 77ffeff8
[ 1.212000]
[ 1.212000] *************** MT7621 PCIe RC mode *************
▒
Boot and Recovery Environment for Embedded Devices
Copyright (C) 2017 HackPascal <hackpascal@gmail.com>
Build date 2017-09-21 [git-35a696e]
Version 1.1 (r1126)
DRAM: 128MB
Platform: MediaTek MT7621A ver 1, eco 3
Board: Phicomm K2P
Clocks: CPU: 880MHz, DDR: 1200MHz, Bus: 293MHz, Ref: 40MHz
Flash: Macronix MX25L12835E (16MB) on rt6855a-spi
rt2880-eth: MAC address from EEPROM is invalid, using default settings.
rt2880-eth: Using MAC address 00:0c:43:00:00:01
eth0: MediaTek MT7530 Gigabit switch
Network started on eth0, inet addr 192.168.1.1, netmask 255.255.255.0
Press any key to interrupt autoboot ... 0
Trying to boot firmware from 0x000a0000 in flash bank 0 ...
Reading data into memory ...
U-Boot firmware image header detected.
Image Name: OpenWrt-Linux-3.10.14
Data Size: 3241002 Bytes
Load Address: 81001000
Entry Point: 81001000
Uncompressing data (LZMA) ... done.
Flushing cache ... done.
Starting kernel at 0x81001000...
LINUX started...
THIS IS ASIC
SDK 5.0.S.0
[ 0.000000] Linux version 3.10.14 (jenkins@SOHO-OPWRT) (gcc version 4.8.3 (OpenWrt/Linaro GCC 4.8-2014.04 unknown) ) #1 SMP Thu May 4 18:12:48 CST 2017
[ 0.000000]
[ 0.000000] The CPU feqenuce set to 880 MHz
[ 0.000000] GCMP present
[ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[ 0.000000] Software DMA cache coherency
[ 0.000000] Determined physical RAM map:
[ 0.000000] memory: 08000000 @ 00000000 (usable)
[ 0.000000] Initrd not found or empty - disabling initrd
[ 0.000000] Zone ranges:
[ 0.000000] DMA [mem 0x00000000-0x00ffffff]
[ 0.000000] Normal [mem 0x01000000-0x07ffffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x00000000-0x07ffffff]
[ 0.000000] Detected 3 available secondary CPU(s)
[ 0.000000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
[ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.000000] PERCPU: Embedded 7 pages/cpu @8198e000 s6464 r8192 d14016 u32768
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32512
[ 0.000000] Kernel command line: console=ttyS1,57600n8 root=/dev/mtdblock6 rootfstype=squashfs,jffs2
[ 0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
[ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
[ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
[ 0.000000] Writing ErrCtl register=0004b04e
[ 0.000000] Readback ErrCtl register=0004b04e
[ 0.000000] Memory: 121064k/131072k available (5395k kernel code, 10008k reserved, 2338k data, 260k init, 0k highmem)
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] NR_IRQS:128
[ 0.000000] console [ttyS1] enabled
[ 0.120000] Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072)
[ 0.160000] pid_max: default: 32768 minimum: 301
[ 0.164000] Mount-cache hash table entries: 512
[ 0.168000] launch: starting cpu1
[ 0.172000] launch: cpu1 gone!
[ 0.172000] CPU1 revision is: 0001992f (MIPS 1004Kc)
[ 0.172000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
[ 0.172000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.172000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.204000] Synchronize counters for CPU 1: done.
[ 0.212000] launch: starting cpu2
[ 0.216000] launch: cpu2 gone!
[ 0.216000] CPU2 revision is: 0001992f (MIPS 1004Kc)
[ 0.216000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
[ 0.216000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.216000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.248000] Synchronize counters for CPU 2: done.
[ 0.256000] launch: starting cpu3
[ 0.260000] launch: cpu3 gone!
[ 0.260000] CPU3 revision is: 0001992f (MIPS 1004Kc)
[ 0.260000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
[ 0.260000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.260000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.288000] Synchronize counters for CPU 3: done.
[ 0.296000] Brought up 4 CPUs
[ 0.300000] NET: Registered protocol family 16
[ 0.600000] release PCIe RST: RALINK_RSTCTRL = 7000000
[ 0.604000] PCIE PHY initialize
[ 0.608000] ***** Xtal 40MHz *****
[ 0.612000] start MT7621 PCIe register access
[ 1.204000] RALINK_RSTCTRL = 7000000
[ 1.208000] RALINK_CLKCFG1 = 77ffeff8
[ 1.212000]
[ 1.212000] *************** MT7621 PCIe RC mode ************* |
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