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原跑码:
[ 0.730000] release PCIe RST: RALINK_RSTCTRL = 7000000
[ 0.740000] PCIE PHY initialize
[ 0.740000] ***** Xtal 40MHz *****
[ 0.740000] start MT7621 PCIe register access
[ 1.340000] RALINK_RSTCTRL = 7000000
[ 1.340000] RALINK_CLKCFG1 = 77ffeff8
[ 1.340000]
[ 1.340000] *************** MT7621 PCIe RC mode *************
[ 1.840000] PCIE2 no card, disable it(RST&CLK)
[ 1.840000] pcie_link status = 0x3
[ 1.850000] RALINK_RSTCTRL= 3000000
[ 1.850000] *** Configure Device number setting of Virtual PCI-PCI bridge ***
[ 1.860000] RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2
[ 1.860000] PCIE0 enabled
[ 1.860000] PCIE1 enabled
[ 1.870000] interrupt enable status: 300000
[ 1.870000] Port 1 N_FTS = 1b105000
[ 1.870000] Port 0 N_FTS = 1b105000
[ 1.880000] config reg done
[ 1.880000] init_rt2880pci done
[ 1.910000] bio: create slab <bio-0> at 0
[ 1.910000] SCSI subsystem initialized
[ 1.920000] usbcore: registered new interface driver usbfs
[ 1.920000] usbcore: registered new interface driver hub
[ 1.930000] usbcore: registered new device driver usb
[ 1.930000] PCI host bridge to bus 0000:00
[ 1.930000] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
[ 1.940000] pci_bus 0000:00: root bus resource [io 0x1e160000-0x1e16ffff]
[ 1.940000] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
[ 1.950000] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 1.950000] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 1.960000] pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000)
[ 1.960000] pci 0000:00:01.0: BAR 0: can't assign mem (size 0x80000000)
[ 1.970000] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
[ 1.970000] pci 0000:00:01.0: BAR 8: assigned [mem 0x60100000-0x601fffff]
[ 1.980000] pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff]
[ 1.980000] pci 0000:00:01.0: BAR 1: assigned [mem 0x60210000-0x6021ffff]
[ 1.990000] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
[ 1.990000] pci 0000:00:00.0: PCI bridge to [bus 01]
[ 2.000000] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff]
[ 2.000000] pci 0000:02:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff 64bit]
[ 2.010000] pci 0000:00:01.0: PCI bridge to [bus 02]
[ 2.010000] pci 0000:00:01.0: bridge window [mem 0x60100000-0x601fffff]
[ 2.020000] PCI: Enabling device 0000:00:00.0 (0004 -> 0006)
[ 2.020000] PCI: Enabling device 0000:00:01.0 (0004 -> 0006)
[ 2.030000] BAR0 at slot 0 = 0
[ 2.030000] bus=0x0, slot = 0x0
[ 2.030000] res[0]->start = 0
[ 2.030000] res[0]->end = 0
[ 2.040000] res[1]->start = 60200000
[ 2.040000] res[1]->end = 6020ffff
[ 2.040000] res[2]->start = 0
[ 2.040000] res[2]->end = 0
[ 2.050000] res[3]->start = 0
[ 2.050000] res[3]->end = 0
[ 2.050000] res[4]->start = 0
[ 2.050000] res[4]->end = 0
[ 2.060000] res[5]->start = 0
[ 2.060000] res[5]->end = 0
[ 2.060000] BAR0 at slot 1 = 0
[ 2.060000] bus=0x0, slot = 0x1
[ 2.070000] res[0]->start = 0
[ 2.070000] res[0]->end = 0
[ 2.070000] res[1]->start = 60210000
[ 2.070000] res[1]->end = 6021ffff
[ 2.080000] res[2]->start = 0
[ 2.080000] res[2]->end = 0
[ 2.080000] res[3]->start = 0
[ 2.080000] res[3]->end = 0
[ 2.090000] res[4]->start = 0
[ 2.090000] res[4]->end = 0
[ 2.090000] res[5]->start = 0
[ 2.090000] res[5]->end = 0
[ 2.100000] bus=0x1, slot = 0x0, irq=0x4
[ 2.100000] res[0]->start = 60000000
[ 2.100000] res[0]->end = 600fffff
[ 2.110000] res[1]->start = 0
[ 2.110000] res[1]->end = 0
[ 2.110000] res[2]->start = 0
[ 2.110000] res[2]->end = 0
[ 2.120000] res[3]->start = 0
[ 2.120000] res[3]->end = 0
[ 2.120000] res[4]->start = 0
[ 2.120000] res[4]->end = 0
[ 2.130000] res[5]->start = 0
[ 2.130000] res[5]->end = 0
[ 2.130000] bus=0x2, slot = 0x1, irq=0x18
[ 2.130000] res[0]->start = 60100000
[ 2.140000] res[0]->end = 601fffff
[ 2.140000] res[1]->start = 0
[ 2.140000] res[1]->end = 0
[ 2.140000] res[2]->start = 0
[ 2.150000] res[2]->end = 0
[ 2.150000] res[3]->start = 0
[ 2.150000] res[3]->end = 0
[ 2.150000] res[4]->start = 0
[ 2.160000] res[4]->end = 0
[ 2.160000] res[5]->start = 0
[ 2.160000] res[5]->end = 0
[ 2.170000] cfg80211: Calling CRDA to update world regulatory domain
[ 2.170000] Switching to clocksource MIPS
[ 2.180000] NET: Registered protocol family 2
[ 2.180000] TCP established hash table entries: 4096 (order: 3, 32768 bytes)
[ 2.190000] TCP bind hash table entries: 4096 (order: 3, 32768 bytes)
[ 2.200000] TCP: Hash tables configured (established 4096 bind 4096)
[ 2.200000] TCP: reno registered
[ 2.210000] UDP hash table entries: 256 (order: 1, 8192 bytes)
[ 2.210000] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
[ 2.220000] NET: Registered protocol family 1
[ 2.260000] Kernel panic - not syncing: XZ-compressed data is corrupt
[ 2.260000] csd: CSD deadlock debugging initiated!
[ 2.270000] Stop this cpu 1
[ 2.270000] Stop this cpu 3
[ 2.270000] Stop this cpu 0
有道翻译:
[0.730000]作为PCIe RST释放:RALINK_RSTCTRL = 7000000
[0.740000]作为PCIE PHY初始化
(0.740000)* * * * *晶体40 mhz * * * * *
[0.740000]开始MT7621作为PCIe寄存器的访问
[1.340000]RALINK_RSTCTRL = 7000000
[1.340000]RALINK_CLKCFG1 = 77 ffeff8
[1.340000]
[1.340000]* * * * * * * * * * * * * * *作为PCIe RC MT7621模式* * * * * * * * * * * * *
[1.840000]PCIE2没有卡,禁用它(RST&CLK)
[1.840000]= 0 x3 pcie_link状态
[1.850000]RALINK_RSTCTRL = 3000000
[1.850000]* * *配置设备号设置的虚拟PCI-PCI桥* * *
[1.860000]RALINK_PCI_PCICFG_ADDR = 21007 f2 - > 21007 f2
[1.860000]PCIE0启用
[1.860000]PCIE1启用
[1.870000]中断启用状态:300000
[1.870000]1 N_FTS = 1 b105000港
[1.870000]0 N_FTS = 1 b105000港
[1.880000]配置注册完成
[1.880000]init_rt2880pci完成
[1.910000]生物:创建板< bio-0 > 0
[1.910000]SCSI子系统初始化
[1.920000]usbcore:注册新接口驱动程序
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