|
能进系统,刷不回官方!
===================================================================
MT7621 stage1 code 10:33:11 (ASIC)
CPU=50000000 HZ BUS=16666666 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x11100000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-1200Mhz ===
PLL4 FB_DL: 0x0, 1/0 = 877/147 01000000
PLL2 FB_DL: 0x12, 1/0 = 650/374 49000000
PLL3 FB_DL: 0x16, 1/0 = 760/264 59000000
do DDR setting..[00320381]
Apply DDR3 Setting...(use customer AC)
0 8 16 24 32 40 48 56 64 72 80 88 96 104 11 2 120
-------------------------------------------------------------------------- ------
0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
000E:| 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
000F:| 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0
0010:| 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
0011:| 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0
0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
rank 0 coarse = 15
rank 0 fine = 72
B:| 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0
opt_dle value:9
DRAMC_R0DELDLY[018]=0000201F
==================================================================
RX DQS perbit delay software calibration
==================================================================
1.0-15 bit dq delay value
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 9 6 7 8 6 7 6 6 7 8
10 | 9 9 9 11 8 9
--------------------------------------
==================================================================
2.dqs window
x=pass dqs delay value (min~max)center
y=0-7bit DQ of every group
input delayQS0 =31 DQS1 = 32
==================================================================
bit DQS0 bit DQS1
0 (1~61)31 8 (1~60)30
1 (1~59)30 9 (1~60)30
2 (1~58)29 10 (1~62)31
3 (1~61)31 11 (1~60)30
4 (1~60)30 12 (1~62)31
5 (1~60)30 13 (1~61)31
6 (1~57)29 14 (1~63)32
7 (1~62)31 15 (1~64)32
==================================================================
3.dq delay value last
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 9 7 9 8 7 8 8 6 9 10
10 | 10 11 10 12 8 9
==================================================================
==================================================================
TX perbyte calibration
==================================================================
DQS loop = 15, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1
dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2
DQ loop=15, cmp_err_1 = ffff00a2
dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=1
DQ loop=14, cmp_err_1 = ffff0080
DQ loop=13, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqdly_pass[0]=13, finish count=2
byte:0, (DQS,DQ)=(9,8)
byte:1, (DQS,DQ)=(8,8)
20,data:89
[EMI] DRAMC calibration passed
===================================================================
MT7621 stage1 code done
CPU=50000000 HZ BUS=16666666 HZ
===================================================================
U-Boot 1.1.3 (Nov 11 2016 - 11:39:34)
Board: Ralink APSoC DRAM: 256 MB
Power on memory test. Memory size= 256 MB...OK!
relocate_code Pointer at: 8ffac000
Config XHCI 40M PLL
Allocate 16 byte aligned buffer: 8ffe0050
Enable NFI Clock
# MTK NAND # : Use HW ECC
NAND ID [C8 DA 90 95 44]
Device found in MTK table, ID: c8da, EXT_ID: 909544
Support this Device in MTK table! c8da
select_chip
[NAND]select ecc bit:4, sparesize :64 spare_per_sector=16
Signature matched and data read!
load_fact_bbt success 2047
load fact bbt success
[mtk_nand] probe successfully!
mtd->writesize=2048 mtd->oobsize=64, mtd->erasesize=131072 devinfo.iowidth=8
..============================================
Ralink UBoot Version: 5.0.0.0
--------------------------------------------
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection
DRAM_TYPE: DDR3
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/3
Flash component: NAND Flash
Date:Nov 11 2016 Time:11:39:34
============================================
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768
##### The CPU freq = 880 MHZ ####
estimate memory size =256 Mbytes
#Reset_MT7530
set LAN/WAN LLLLW
boot_wait=off, overrided for safety
Please choose the operation:
1: Load system code to SDRAM via TFTP.
2: Load system code then write to Flash via TFTP.
3: Boot system code via Flash (default).
4: Entr boot command line interface.
7: Load Boot Loader code then write to Flash via Serial.
9: Load Boot Loader code then write to Flash via TFTP.
You choosed 3
0
Boot failure detected on both systems
Verifying kernel1 uImage CRC, addr: 0xbc200000
Image Name: MIPS OpenWrt Linux-5.10.100
Image Type: MIPS Linux Kernel Image (uncompressed)
Data Size: 2809014 Bytes = 2.7 MB
Load Address: 80001000
Entry Point: 80001000
........................................... Verifying Checksum ... OK
Booting System 1
..Erasing NAND Flash...
ranand_erase: start:40000, len:20000
.Writing to NAND Flash...
done
3: System Boot system code via Flash.
## Booting image at bc200000 ...
Image Name: MIPS OpenWrt Linux-5.10.100
Image Type: MIPS Linux Kernel Image (uncompressed)
Data Size: 2809014 Bytes = 2.7 MB
Load Address: 80001000
Entry Point: 80001000
........................................... Verifying Checksum ... OK
OK
commandline uart_en=1 factory_mode=0 usb_u3=0
No initrd
## Transferring control to Linux (at address 80001000) ...
## Giving linux memsize in MB, 256
Starting kernel ...
OpenWrt kernel loader for MIPS based SoC
Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
Decompressing kernel... done!
Starting kernel at 80001000...
[ 0.000000] Linux version 5.10.100 (runner@fv-az135-390) (mipsel-openwrt-linu x-musl-gcc (OpenWrt GCC 8.4.0 r4213-2cef640d5) 8.4.0, GNU ld (GNU Binutils) 2.34 ) #0 SMP Sat Feb 19 01:59:00 2022
[ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
[ 0.000000] printk: bootconsole [early0] enabled
[ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[ 0.000000] MIPS: machine is Xiaomi Mi Router 3 Pro
[ 0.000000] Initrd not found or empty - disabling initrd
[ 0.000000] VPE topology {2,2} total 4
[ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 byt es
[ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x000000000fffffff]
[ 0.000000] HighMem [mem 0x0000000010000000-0x0000000023ffffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x000000001bffffff]
[ 0.000000] node 0: [mem 0x0000000020000000-0x0000000023ffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000023ffffff]
[ 0.000000] percpu: Embedded 15 pages/cpu s30640 r8192 d22608 u61440
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 130496
[ 0.000000] Kernel command line: console=ttyS0,115200n8 rootfstype=squashfs,j ffs2
[ 0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes, l inear)
[ 0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes, lin ear)
[ 0.000000] Writing ErrCtl register=0001843e
[ 0.000000] Readback ErrCtl register=0001843e
[ 0.000000] mem auto-init: stackff, heap allocff, heap freeff
[ 0.000000] Memory: 508196K/524288K available (6869K kernel code, 624K rwdata , 1416K rodata, 1252K init, 237K bss, 16092K reserved, 0K cma-reserved, 262144K highmem)
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[ 0.000000] rcu: Hierarchical RCU implementation.
[ 0.000000] Tracing variant of Tasks RCU enabled.
[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jif fies.
[ 0.000000] NR_IRQS: 256
[ 0.000000] random: get_random_bytes called from start_kernel+0x3d0/0x5e4 wit h crng_init=0
[ 0.000000] CPU Clock: 880MHz
[ 0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478ab b4, max_idle_ns: 440795247997 ns
[ 0.000013] sched_clock: 64 bits at 880MHz, resolution 1ns, wraps every 43980 46511103ns
[ 0.007953] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_i dle_ns: 4343773742 ns
[ 0.016930] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
[ 0.083103] pid_max: default: 32768 minimum: 301
[ 0.087873] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linea r)
[ 0.095078] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[ 0.105565] rcu: Hierarchical SRCU implementation.
[ 0.110580] dyndbg: Ignore empty _ddebug table in a CONFIG_DYNAMIC_DEBUG_CORE build
[ 0.118624] smp: Bringing up secondary CPUs ...
[ 0.123838] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.123849] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 byt es
[ 0.123863] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.123943] CPU1 revision is: 0001992f (MIPS 1004Kc)
[ 0.178507] Synchronize counters for CPU 1: done.
[ 0.210942] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.210953] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 byt es
[ 0.210963] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.211013] CPU2 revision is: 0001992f (MIPS 1004Kc)
[ 0.269871] Synchronize counters for CPU 2: done.
[ 0.300388] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.300398] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 byt es
[ 0.300406] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.300459] CPU3 revision is: 0001992f (MIPS 1004Kc)
[ 0.355067] Synchronize counters for CPU 3: done.
[ 0.384948] smp: Brought up 1 node, 4 CPUs
[ 0.393300] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, ma x_idle_ns: 19112604462750000 ns
[ 0.403122] futex hash table entries: 1024 (order: 3, 32768 bytes, linear)
[ 0.410151] pinctrl core: initialized pinctrl subsystem
[ 0.417244] NET: Registered protocol family 16
[ 0.423724] cpuidle: using governor teo
[ 0.449930] random: fast init done
[ 0.474865] clocksource: Switched to clocksource GIC
[ 0.481939] NET: Registered protocol family 2
[ 0.486535] IP idents hash table entries: 4096 (order: 3, 32768 bytes, linear )
[ 0.495362] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes, linear)
[ 0.503640] TCP established hash table entries: 2048 (order: 1, 8192 bytes, l inear)
[ 0.511316] TCP bind hash table entries: 2048 (order: 2, 16384 bytes, linear)
[ 0.518436] TCP: Hash tables configured (established 2048 bind 2048)
[ 0.524919] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)
[ 0.531382] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)
[ 0.538595] NET: Registered protocol family 1
[ 0.542898] PCI: CLS 0 bytes, default 32
[ 0.549562] workingset: timestamp_bits=14 max_order=17 bucket_order=3
[ 0.560267] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 0.566094] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORIT Y) (c) 2001-2006 Red Hat, Inc.
[ 0.576644] bounce: pool size: 64 pages
[ 0.582438] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 0.588358] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 0.594198] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 0.600921] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
[ 0.608960] printk: console [ttyS0] disabled
[ 0.613263] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 19, base_baud = 3125000) is a 16550A
[ 0.622277] printk: console [ttyS0] enabled
[ 0.622277] printk: console [ttyS0] enabled
[ 0.630533] printk: bootconsole [early0] disabled
[ 0.630533] printk: bootconsole [early0] disabled
[ 0.642361] mt7621-nand 1e003000.nand: Using programmed access timing: 31c073 88
[ 0.649785] nand: device found, Manufacturer ID: 0xc8, Chip ID: 0xda
[ 0.656162] nand: ESMT NAND 256MiB 3,3V 8-bit
[ 0.660507] nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB siz e: 64
[ 0.668064] mt7621-nand 1e003000.nand: ECC strength adjusted to 4 bits
[ 0.674595] mt7621-nand 1e003000.nand: Using programmed access timing: 31c073 88
[ 0.681889] mt7621-nand 1e003000.nand: Using programmed access timing: 31c073 88
[ 0.689181] Scanning device for bad blocks
[ 4.638990] 10 fixed-partitions partitions found on MTD device mt7621-nand
[ 4.645856] Creating 10 MTD partitions on "mt7621-nand":
[ 4.651150] 0x000000000000-0x000000040000 : "Bootloader"
[ 4.657342] 0x000000040000-0x000000080000 : "Config"
[ 4.663099] 0x000000080000-0x0000000c0000 : "Bdata"
[ 4.668762] 0x0000000c0000-0x000000100000 : "factory"
[ 4.674599] 0x000000100000-0x000000140000 : "crash"
[ 4.680217] 0x000000140000-0x0000001c0000 : "crash_syslog"
[ 4.686568] 0x0000001c0000-0x000000200000 : "reserved0"
[ 4.692489] 0x000000200000-0x000000600000 : "kernel_stock"
[ 4.698814] 0x000000600000-0x000000a00000 : "kernel"
[ 4.704497] 0x000000a00000-0x00000ff80000 : "ubi"
[ 4.756436] mt7530 mdio-bus:1f: MT7530 adapts as multi-chip module
[ 4.765997] mtk_soc_eth 1e100000.ethernet: generated random MAC address f2:d5 :8c:b5:8c:38
[ 4.775052] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe 100000, irq 22
[ 4.786993] mt7621-pci 1e140000.pcie: host bridge /pcie@1e140000 ranges:
[ 4.793738] mt7621-pci 1e140000.pcie: MEM 0x0060000000..0x006fffffff -> 0x0000000000
[ 4.801935] mt7621-pci 1e140000.pcie: IO 0x001e160000..0x001e16ffff -> 0x0000000000
[ 4.810209] mt7621-pci 1e140000.pcie: Parsing DT failed
[ 4.817784] NET: Registered protocol family 10
[ 4.823950] Segment Routing with IPv6
[ 4.827790] NET: Registered protocol family 17
[ 4.832626] 8021q: 802.1Q VLAN Support v1.8
[ 4.840820] mt7530 mdio-bus:1f: MT7530 adapts as multi-chip module
[ 4.866021] mt7530 mdio-bus:1f lan3 (uninitialized): PHY [dsa-0.0:01] driver [Generic PHY] (irq=POLL)
[ 4.877716] mt7530 mdio-bus:1f lan2 (uninitialized): PHY [dsa-0.0:02] driver [Generic PHY] (irq=POLL)
[ 4.889436] mt7530 mdio-bus:1f lan1 (uninitialized): PHY [dsa-0.0:03] driver [Generic PHY] (irq=POLL)
[ 4.901075] mt7530 mdio-bus:1f wan (uninitialized): PHY [dsa-0.0:04] driver [ Generic PHY] (irq=POLL)
[ 4.913131] mt7530 mdio-bus:1f: configuring for fixed/rgmii link mode
[ 4.923777] DSA: tree 0 setup
[ 4.927180] rt2880-pinmux pinctrl: pcie is already enabled
[ 4.932733] mt7621-pci 1e140000.pcie: host bridge /pcie@1e140000 ranges:
[ 4.939469] mt7621-pci 1e140000.pcie: MEM 0x0060000000..0x006fffffff -> 0x0000000000
[ 4.947665] mt7621-pci 1e140000.pcie: IO 0x001e160000..0x001e16ffff -> 0x0000000000
[ 4.955924] mt7621-pci-phy 1e149000.pcie-phy: PHY for 0xbe149000 (dual port = 1)
[ 4.963753] mt7621-pci-phy 1e14a000.pcie-phy: PHY for 0xbe14a000 (dual port = 0)
[ 5.071676] mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz
[ 5.077273] mt7621-pci-phy 1e14a000.pcie-phy: Xtal is 40MHz
[ 5.182982] mt7621-pci 1e140000.pcie: pcie2 no card, disable it (RST & CLK)
[ 5.189944] mt7621-pci 1e140000.pcie: PCIE0 enabled
[ 5.194800] mt7621-pci 1e140000.pcie: PCIE1 enabled
[ 5.199674] mt7621-pci 1e140000.pcie: PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
[ 5.209174] mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00
[ 5.215551] pci_bus 0000:00: root bus resource [io 0x1e160000-0x1e16ffff]
[ 5.222404] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
[ 5.229266] pci_bus 0000:00: root bus resource [bus 00-ff]
[ 5.234733] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff] (b us address [0x00000000-0x0fffffff])
[ 5.244947] pci 0000:00:00.0: [0e8d:0801] type 01 class 0x060400
[ 5.250947] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x7fffffff]
[ 5.257206] pci 0000:00:00.0: reg 0x14: initial BAR value 0x00000000 invalid
[ 5.264223] pci 0000:00:00.0: reg 0x14: [mem size 0x00010000]
[ 5.270031] pci 0000:00:00.0: supports D1
[ 5.274026] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
[ 5.280269] pci 0000:00:01.0: [0e8d:0801] type 01 class 0x060400
[ 5.286315] pci 0000:00:01.0: reg 0x10: [mem 0x00000000-0x7fffffff]
[ 5.292560] pci 0000:00:01.0: reg 0x14: initial BAR value 0x00000000 invalid
[ 5.299591] pci 0000:00:01.0: reg 0x14: [mem size 0x00010000]
[ 5.305402] pci 0000:00:01.0: supports D1
[ 5.309397] pci 0000:00:01.0: PME# supported from D0 D1 D3hot
[ 5.316722] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), rec onfiguring
[ 5.324714] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), rec onfiguring
[ 5.332974] pci 0000:01:00.0: [14c3:7615] type 00 class 0x000280
[ 5.339035] pci 0000:01:00.0: reg 0x10: initial BAR value 0x00000000 invalid
[ 5.346080] pci 0000:01:00.0: reg 0x10: [mem size 0x00100000 64bit]
[ 5.352489] pci 0000:01:00.0: 2.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s PCIe x1 link at 0000:00:00.0 (capable of 4.000 Gb/s with 5.0 GT/s PCIe x1 link)
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