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水星300R V2版已经改用7241+9287芯片啦,附TTL:
AP99 (ar7241 - Virian) U-boot
DRAM:
sri
a ag7240_enet_initialize...
No valid address in Flash. Using fixed address
No&?flash_size passed from bootloader = 4
CPU revision is: 00019374
Determined physical RAM map:
memory: 02000000 @ 00000000 (usable)
User-defined physical RAM map:
memory: 02000000 @ 00000000 (usable)
Built 1 zonelists
Kernel command line: console=ttyS0,115200 root=31:2 rootfstype=squashfs init=/sb
in/init mtdparts=ar7240-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config
),64k(art) mem=32M
Primary instruction cache 64kB, physically tagged, 4-way, linesize 32 bytes.
Primary data cache 32kB, 4-way, linesize 32 bytes.
Synthesized TLB refill handler (20 instructions).
Synthesized TLB load handler fastpath (32 instructions).
Synthesized TLB store handler fastpath (32 instructions).
Synthesized TLB modify handler fastpath (31 instructions).
Cache parity protection disabled
PID hash table entries: 256 (order: 8, 4096 bytes)
Using 200.000 MHz high precision timer.
Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
Memory: 30456k/32768k available (1461k kernel code, 2296k reserved, 306k data, 1
12k init, 0k highmem)
Mount-cache hash table entries: 512
Checking for 'wait' instruction... available.
NET: Registered protocol family 16
PCI init:ar7240_pcibios_init
usbcore: registered new driver usbfs
Reset button pressed.
usbcore: registered new driver hub
Returning IRQ 48
AR7240 GPIOC major 0
squashfs: version 3.3 (2007/10/31) Phillip Lougher
squashfs: LZMA suppport for slax.org by jro
Initializing Cryptographic API
io scheduler noop registered
io scheduler deadline registered
HDLC line discipline: version $Revision: #1 $, maxframe=4096
N_HDLC line discipline registered.
Serial: 8250/16550 driver $Revision: #2 $ 1 ports, IRQ sharing disabled
serial8250.0: ttyS0 at MMIO 0x0 (irq = 19) is a 16550A
RAMDISK driver initialized: 1 RAM disks of 8192K size 1024 blocksize
PPP generic driver version 2.4.2
NET: Registered protocol family 24
cmdlinepart partition parsing not available
Searching for RedBoot partition table
5 RedBoot partitions found on MTD device ar7240-nor0
Creating 5 MTD partitions on "ar7240-nor0":
0x00000000-0x00020000 : "boot"
0x00020000-0x00120000 : "kernel"
0x00120000-0x003e0000 : "rootfs"
0x003e0000-0x003f0000 : "config"
ar7240-ehci ar7240-ehci.0: ATH EHCI
ar7240-ehci ar7240-ehci.0: new USB bus registered, assigned bus number 1
ar7240-ehci ar7240-ehci.0: irq 3, io mem 0x1b000000
hcc_params addr 0xbb000108 val 0x6 hcs_params addr 0xbb000104 val 0x10011
ar7240-ehci ar7240-ehci.0: USB 2.0 started, EHCI 1.00, driver 10 Dec 2004
TCP established hash table entries: 2048 (order: 1, 8192 bytes)
TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
TCP reno registered
TCP bic registered
NET: Registered protocol family 1
NET: Registered protocol family 17
802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com>
All bugs added by David S. Miller <davem@re cannot open module `/lib/modules/2.6
AG7240: Max segments per packet 1ile or dir cannot open module `/lib/module
AG7240: Max tx descriptor count 80
AG7240: Max rx descriptor count 252
AG7240: Max rx descriptor count 252
br0: port 2(ath1) entering learning state
br0: port 3(ath0) entering learning state
br0: topology change detected, propagating
br0: port 3(ath0) entering forwarding state
br0: port 3(ath0) entering learning state
br0: topology change detected, propaincorrect
TCP established hash table entries: 2048 (order: 1, 8192 bytes)login:
TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
TCP reno registered
TCP bic registered
NET: Registered protocol family 1
NET: Registered protocol family 17
802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com>
AG7240: Max segments per packet 1 <davem@re
AG7240: Max tx descriptor count ??br0: port 2(ath1) entering learning state
br0: topology change detected, propagating
br0: port 3(ath0) entering learning state
br0: topology change detected, propagating
br0: port 3(ath0) entering forwarding state
br0: port 3(ath0) entering learning state
br0: port 2(ath1) entering learning state
br0: topology change detected, propa |
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