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Ubiquiti EdgeRouter X (ER-X)上手抢先看

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 楼主| 发表于 2017-8-19 21:44 | 显示全部楼层
本帖最后由 至尊红颜 于 2017-8-22 08:45 编辑

u-boot中断正常启动,就是那个倒计时,然后uboot命令模式了,tftp就好,你刷吧,有问题就联系我。OP官网就有编译好的固件,不过没有tnat硬件转发,只有官网固件有哦

点评

全部按你的步骤用putty到 TFTP from server 192.168.2.104; our IP address is 192.168.2.199 Filename 'openwrt.bin'.这步 tftp设置和PC端的设置就不会了 PC网卡IP设置到192.168.2.*?ping不通192.168.2.104,1  详情 回复 发表于 2017-9-15 18:14
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发表于 2017-8-22 01:00 | 显示全部楼层
不过这货价格感人.

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是的,价格不菲呢。东西到时挺小巧精致。  详情 回复 发表于 2017-8-22 08:46
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 楼主| 发表于 2017-8-22 08:46 | 显示全部楼层
荒野无灯 发表于 2017-8-22 01:00
不过这货价格感人.

是的,价格不菲呢。东西到时挺小巧精致。
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发表于 2017-9-15 18:14 | 显示全部楼层
本帖最后由 jtseng 于 2017-9-18 17:41 编辑
至尊红颜 发表于 2017-8-19 21:44
u-boot中断正常启动,就是那个倒计时,然后uboot命令模式了,tftp就好,你刷吧,有问题就联系我。OP官网就 ...

搞定,thx。。。。
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发表于 2017-9-18 07:37 | 显示全部楼层
anyangbbs 发表于 2016-9-14 23:22
啥也没有还那么贵。。

硬件转发还算行,64/130,用过才知道这玩意有多稳定
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发表于 2017-9-18 21:58 | 显示全部楼层
刷成openwrt成功了,重启后自动回到EDGE os是什么情况?
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发表于 2017-9-18 22:04 | 显示全部楼层

______                     ________        __
|       |.-----.-----.-----.|  |  |  |.----.|  |_
|   -   ||  _  |  -__|     ||  |  |  ||   _||   _|
|_______||   __|_____|__|__||________||__|  |____|
          |__| W I R E L E S S   F R E E D O M
-----------------------------------------------------
DESIGNATED DRIVER (Bleeding Edge, r47881)
-----------------------------------------------------
  * 2 oz. Orange Juice         Combine all juices in a
  * 2 oz. Pineapple Juice      tall glass filled with
  * 2 oz. Grapefruit Juice     ice, stir well.
  * 2 oz. Cranberry Juice
-----------------------------------------------------
root@OpenWrt:/# root
/bin/ash: root: not found
root@OpenWrt:/# reboot
root@OpenWrt:/# [ 1750.410000] br-lan: port 1(eth0.1) entered disabled state
[ 1750.420000] device eth0.1 left promiscuous mode
[ 1750.430000] br-lan: port 1(eth0.1) entered disabled state
[ 1750.450000] IPv6: ADDRCONF(NETDEV_UP): eth0.1: link is not ready
[ 1750.660000] device eth0 left promiscuous mode
[ 1754.820000] reboot: Restarting system

===================================================================
                MT7621   stage1 code 10:33:11 (ASIC)
                CPU=50000000 HZ BUS=16666666 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x11100000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-1200Mhz ===
PLL2 FB_DL: 0x12, 1/0 = 642/382 49000000
PLL3 FB_DL: 0x12, 1/0 = 603/421 49000000
PLL4 FB_DL: 0x16, 1/0 = 667/357 59000000
do DDR setting..[00320381]
Apply DDR3 Setting...(use customer AC)
          0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
      --------------------------------------------------------------------------------
0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    1    1    1
000E:|    0    0    0    0    0    0    0    0    1    1    1    1    1    1    1    1
000F:|    0    0    0    0    1    1    1    1    1    1    1    1    1    0    0    0
0010:|    1    1    1    1    1    1    1    1    0    0    0    0    0    0    0    0
0011:|    1    1    1    0    0    0    0    0    0    0    0    0    0    0    0    0
0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0019:|    0    0    0    0    0    0    0
Welcome to EdgeOS ubnt ttyS1

By logging in, accessing, or using the Ubiquiti product, you
acknowledge that you have read and understood the Ubiquiti
License Agreement (available in the Web UI at, by default,
http://192.168.1.1) and agree to be bound by its terms.

ubnt login: ed 3 available secondary CPU(s)
65024
Kernel command line: console=ttyS1,57600n8 ubi.mtd=7 root=ubi0_0 rootfstype=ubifs rootsqimg=squashfs.img rootsqwdir=w rw
PID hash table entries: 1024 (order: 0, 4096 bytes)
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
Writing ErrCtl register=000101c0
Readback ErrCtl register=000101c0
Memory: 254732k/262144k available (3588k kernel code, 7412k reserved, 1026k data, 244k init, 0k highmem)
Hierarchical RCU implementation.
NR_IRQS:128
console [ttyS1] enabled
Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072)
pid_max: default: 32768 minimum: 301
Security Framework initialized
Mount-cache hash table entries: 512
launch: starting cpu1
launch: cpu1 gone!
CPU1 revision is: 0001992f (MIPS 1004Kc)
Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
Synchronize counters for CPU 1: done.
launch: starting cpu2
launch: cpu2 gone!
CPU2 revision is: 0001992f (MIPS 1004Kc)
Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
Synchronize counters for CPU 2: done.
launch: starting cpu3
launch: cpu3 gone!
CPU3 revision is: 0001992f (MIPS 1004Kc)
Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
Synchronize counters for CPU 3: done.
Brought up 4 CPUs
devtmpfs: initialized
NET: Registered protocol family 16
bio: create slab <bio-0> at 0
Switching to clocksource MIPS
NET: Registered protocol family 2
TCP established hash table entries: 2048 (order: 2, 16384 bytes)
TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
TCP: reno registered
UDP hash table entries: 256 (order: 1, 8192 bytes)
UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
NET: Registered protocol family 1
4 CPUs re-calibrate udelay(lpj = 1167360)
squashfs: version 4.0 (2009/01/31) Phillip Lougher
Registering unionfs 2.5.13 (for 3.10.34)
aufs 3.10.x-20140915
msgmni has been set to 497
io scheduler noop registered
io scheduler cfq registered (default)
Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A
serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A
Ralink gpio driver initialized
i2cdrv_major = 218
loop: module loaded
flash manufacture id: c2, device id 20 15
MX25L1605D(c2 2015c220) (2048 Kbytes)
mtd .name = raspi, .size = 0x00200000 (2M) .erasesize = 0x00010000 (64K) .numeraseregions = 0
Creating 1 MTD partitions on "raspi":
0x000000000000-0x000000080000 : "SPI_FLASH"
MediaTek Nand driver init, version v2.1 Fix AHB virt2phys error
Allocate 16 byte aligned buffer: 804d0430
Enable NFI Clock
# MTK NAND # : Use HW ECC
NAND ID [01 DA 90 95 46, 00909546]
Device found in MTK table, ID: 1da, EXT_ID: 909546
Support this Device in MTK table! 1da
NAND device: Manufacturer ID: 0x01, Chip ID: 0xda (AMD/Spansion NAND 256MiB 3,3V 8-bit), 256MiB, page size: 2048, OOB size: 112
[NAND]select ecc bit:12, sparesize :112 spare_per_sector=28
Scanning device for bad blocks
Signature matched and data read!
load_fact_bbt success 2047
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00Password:

Login incorrect
ubnt login:
Login timed out  00 00 00 00 00 00 00 00 00 00 00
Welcome to EdgeOS ubnt ttyS1

By logging in, accessing, or using the Ubiquiti product, you
acknowledge that you have read and understood the Ubiquiti
License Agreement (available in the Web UI at, by default,
http://192.168.1.1) and agree to be bound by its terms.

ubnt login:
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发表于 2020-10-13 22:22 | 显示全部楼层
学习了,OpenWRT刷了不能登录,怎么重新刷OpenWRT固件。
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发表于 2020-10-15 12:50 | 显示全部楼层
感谢楼主!终于刷回官方最新版本
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