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本帖最后由 hello_limin 于 2019-4-3 18:23 编辑
你这个是MTK的芯片呀,我以为是QCA的呢,

- /*
- * TP-LINK TL-WDR5600 v3 board support
- *
- * Copyright (C) 2015 Gabor Juhos <juhosg@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
- #include <linux/pci.h>
- #include <linux/gpio.h>
- #include <linux/platform_device.h>
- #include <asm/mach-ath79/ath79.h>
- #include <asm/mach-ath79/ar71xx_regs.h>
- #include "common.h"
- #include "dev-eth.h"
- #include "dev-ap9x-pci.h"
- #include "dev-gpio-buttons.h"
- #include "dev-leds-gpio.h"
- #include "dev-m25p80.h"
- #include "dev-wmac.h"
- #include "machtypes.h"
- #include "pci.h"
- #define TL_WDR5600V3_GPIO_LED_WAN 19
- #define TL_WDR5600V3_GPIO_LED_LAN1 17
- #define TL_WDR5600V3_GPIO_LED_LAN2 16
- #define TL_WDR5600V3_GPIO_LED_LAN3 15
- #define TL_WDR5600V3_GPIO_LED_LAN4 14
- #define TL_WDR5600V3_GPIO_LED_SYSTEM 21
- #define TL_WR841NV8_GPIO_BTN_RESET 1
- #define TL_WR841NV8_KEYS_POLL_INTERVAL 20 /* msecs */
- #define TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR841NV8_KEYS_POLL_INTERVAL)
- #define TL_WDR5600_V3_WMAC_CALDATA_OFFSET 0x1000
- #define TL_WDR5600_V3_PCIE_CALDATA_OFFSET 0x2000
- static const char *tl_wr841n_v8_part_probes[] = {
- "tp-link-64k",
- NULL,
- };
- static struct flash_platform_data tl_wr841n_v8_flash_data = {
- .part_probes = tl_wr841n_v8_part_probes,
- };
- static struct gpio_led tl_wr941nd_v5_leds_gpio[] __initdata = {
- {
- .name = "tp-link:green:lan1",
- .gpio = TL_WDR5600V3_GPIO_LED_LAN1,
- .active_low = 0,
- }, {
- .name = "tp-link:green:lan2",
- .gpio = TL_WDR5600V3_GPIO_LED_LAN2,
- .active_low = 0,
- }, {
- .name = "tp-link:green:lan3",
- .gpio = TL_WDR5600V3_GPIO_LED_LAN3,
- .active_low = 0,
- }, {
- .name = "tp-link:green:lan4",
- .gpio = TL_WDR5600V3_GPIO_LED_LAN4,
- .active_low = 0,
- }, {
- .name = "tp-link:green:system",
- .gpio = TL_WDR5600V3_GPIO_LED_SYSTEM,
- .active_low = 1,
- }, {
- .name = "tp-link:green:wan",
- .gpio = TL_WDR5600V3_GPIO_LED_WAN,
- .active_low = 1,
- },
- };
- static struct gpio_keys_button tl_wr841n_v8_gpio_keys[] __initdata = {
- {
- .desc = "Reset button",
- .type = EV_KEY,
- .code = KEY_RESTART,
- .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL,
- .gpio = TL_WR841NV8_GPIO_BTN_RESET,
- .active_low = 1,
- },
- };
- static void __init tl_ap123_setup(void)
- {
- u8 *mac = (u8 *) KSEG1ADDR(0x1fff080d);
- u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
- u8 tmpmac[ETH_ALEN];
- ath79_register_m25p80(&tl_wr841n_v8_flash_data);
- /* disable PHY_SWAP and PHY_ADDR_SWAP bits */
- ath79_setup_ar933x_phy4_switch(false, false);
- ath79_register_mdio(1, 0x0);
-
- /* GMAC0 is connected to the PHY0 of the internal switch */
- ath79_switch_data.phy4_mii_en = 1;
- ath79_switch_data.phy_poll_mask = BIT(4);
- ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
- ath79_eth0_data.phy_mask = BIT(4);
- ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
- ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
- ath79_register_eth(0);
- /* GMAC1 is connected to the internal switch */
- ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
- ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
- ath79_register_eth(1);
- ath79_init_mac(tmpmac, mac, -1);
- ath79_register_wmac(art + TL_WDR5600_V3_WMAC_CALDATA_OFFSET, tmpmac);
-
- ap91_pci_init(art + TL_WDR5600_V3_PCIE_CALDATA_OFFSET, NULL);
- }
- static void __init tl_wr941nd_v5_setup(void)
- {
- tl_ap123_setup();
- ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr941nd_v5_leds_gpio),
- tl_wr941nd_v5_leds_gpio);
- ath79_register_gpio_keys_polled(1, TL_WR841NV8_KEYS_POLL_INTERVAL,
- ARRAY_SIZE(tl_wr841n_v8_gpio_keys),
- tl_wr841n_v8_gpio_keys);
- }
- MIPS_MACHINE(ATH79_MACH_TL_WDR5600_V3, "TL-WDR5600-v3", "TP-LINK TL-WDR5600 v3", tl_wr941nd_v5_setup);
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