|
本帖最后由 ffmx5 于 2014-10-9 09:16 编辑
华硕的RT-N11+ JTAG修砖老出错,初步判断可能是配置文件有问题,因为用的是华为255D的cfg文件,但N11+的是4Mflash+16M内存,求高手指点。
以下为所用255D专用jtag cfg文档,求修改成4M+16M可用,谢谢大大了!!{:soso_e100:}
openocd-ralink.cfg
=====================================
set _CHIPNAME rt3052
set _ENDIAN little
#daemon configuration
telnet_port 4444
gdb_port 3333
#interface
interface parport
parport_port 0x378
parport_cable wiggler
#jtag_speed 0
adapter_khz 500
set _CPUTAPID 0x1335024F
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#jtag newtap rt30xx cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id 1
jtag newtap rt30xx cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id 0x1305224f
target create rt30xx.cpu mips_m4k -endian little -chain-position rt30xx.cpu
rt30xx.cpu configure -event reset-halt-post {
#set memory
mww 0x10000300 0xD1825272
sleep 10
mww 0x10000304 0xE0120600
halt
}
rt30xx.cpu configure -event reset-init {
halt
#set memory
mww 0x10000300 0xD1825272
sleep 1
mww 0x10000304 0xE1110600
sleep 10000 ;# wait for lock
halt
sleep 1
flash probe 0
}
proc ralink_init { } {
halt
sleep 10
mww 0x10000300 0xD1825272
sleep 1
mww 0x10000304 0xE0120600 ;# Set Memory 32Mbyte in 32Bit(16MBx16bitx2)
sleep 1 ;# wait for lock
}
proc erase_uboot { } {
flash probe 0
flash erase_sector 0 0 4
}
proc flash_uboot { } {
ralink_init
sleep 1
flash probe 0
flash write_bank 0 uboot.bin 0
}
proc hg255d_full_flash { } {
ralink_init
sleep 1
flash write_image erase uboot.bin 0xbf000000 bin
}
proc run_uboot { } {
ralink_init
sleep 1
load_image u-boot-ram-hg255d.bin 0x000000
resume 0x000000
}
# setup working area somewhere in RAM
#rt30xx.cpu configure \
# -work-area-phys 0xa0600000 \
# -work-area-size 65536 \
# -work-area-backup 0
rt30xx.cpu configure -work-area-phys 0x00000000 -work-area-size 0x100000 -work-area-backup 0
#rt30xx.cpu configure -work-area-phys 0xa0600000 -work-area-size 0x20000 -work-area-backup 0
#rt30xx.cpu configure -work-area-phys 0x00600000 -work-area-size 0x40000
# serial SPI capable flash
# flash bank <driver> <base> <size> <chip_width> <bus_width>
#flash bank rt30xx.flash cfi 0x1f000000 0x1000000 2 2 rt30xx.cpu
flash bank rt30xx.flash cfi 0xbf000000 0x1000000 2 2 rt30xx.cpu
#flash probe 0
==========================================
|
|